AVOSpice is a simulation program for analog-digital circuits represented at the transistor level and optimized for very large-scale integrated circuits simulation.
The following distinctive features of AVOSpice provide significant decrease of circuit simulation time for transient analysis (.TRAN):
- Developed mathematical methods, algorithms and rules system allow classification and separation of circuit variables (potentials) into groups. These groups are generated dynamically at the certain time interval, which allows:
a) to divide in the majority of cases a big system of algebraic equations into a set of independent subsystems. Solving such subsystemsseparately leads to significant decrease of computation resources;
b) to apply mathematical algorithms according to individual peculiarity of each subsystem;
c) to use multiprocessor calculations, which means that every group of variables is processed in a separate processor.
As a result the simulation algorithm for transient analysis becomessimilar to algorithm of event-based simulation. The main resources are spent to simulate only active part of circuit, while the accuracy is the same as for full circuit.
- Conventional algorithms were redesigned in order to save time at the expense of memory (usually algorithms save memory and time simultaneously). The following methods were redesigned:
- algorithms of linear algebraic equation systems solution;
- Jacoby and Seidel iteration algorithms;
- LU and reordering (RO) algorithms;
- integration algorithms (for example, Gere and Shihman algorithms).
- Original data structure efficiently using processor cache memory was designed.
Benchmarks simulation showed, that:
- simulation time decreases in up to 5-1000 times in case the variables are divided into groups (item 1);
- simulation time decreases in up to 2-3 times due to redesigned algorithms and original data structure using (item 2, 3).
The users of AVOSpice found out, that the wide range of integrated circuits satisfy methods, algorithms and system of rules mentioned in item 1. For example, different types of interfaces, memory, generators (including PLL) and processor circuits. Transistors in these circuits work in switch mode.
Some circuits (for example, amplifier and comparator) don’t correspond to methods, algorithms and system of rules mentioned in item 1. For these circuits simulation time decreases due to redesigned algorithms and original data structure (item 2, 3 ).
In the complex circuit there are parts satisfying both rules in item 1, item 2 and item 3. In this case, subcircuit satisfying rules in item 2 and 3 is represented by a separated group of variables and time for simulation of the whole circuit is determined by the time for simulation of the group with the maximum size.
